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From "Tao Li (Jira)" <j...@apache.org>
Subject [jira] [Commented] (MXNET-1084) Enable FP16 Mode for Integrated TensorRT Inference
Date Sun, 29 Dec 2019 03:18:00 GMT

    [ https://issues.apache.org/jira/browse/MXNET-1084?page=com.atlassian.jira.plugin.system.issuetabpanels:comment-tabpanel&focusedCommentId=17004626#comment-17004626
] 

Tao Li commented on MXNET-1084:
-------------------------------

Hi [~kellen.sunderland], is this already WIP or not started yet? Maybe I can help on some
of this. Thanks

> Enable FP16 Mode for Integrated TensorRT Inference
> --------------------------------------------------
>
>                 Key: MXNET-1084
>                 URL: https://issues.apache.org/jira/browse/MXNET-1084
>             Project: Apache MXNet
>          Issue Type: Improvement
>            Reporter: Kellen Sunderland
>            Priority: Major
>
> As as owner of a Turing, Volta, Pascal, or Jetson TX1 device, I would like to run inference
using TensorRT with FP16 DType tensors to make use of dedicated hardware optimizations present.
> Reference: [https://devblogs.nvidia.com/tensor-core-ai-performance-milestones/]
>  [https://devblogs.nvidia.com/programming-tensor-cores-cuda-9/]



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